Sr. ASIC DFT Engineer (Silicon)
SpaceX · Palo Alto, CA
5+ YOE Implement and optimize DFT architectures, including scan insertion, compression/decompression logic, memory BIST, and logic BIST, leveraging Siemens Tessent tools; Integration and verification of Design for Test (DFT)…
Python
This posting is pulled directly from SpaceX's own Greenhouse page and applying happens on their site, not here. Posted 2026-08-06; Skip The Boards re-checks every company's board regularly and removes listings that disappear from the source.