Senior RTL Engineer, IO Die and Interconnect IP
Samsung Semiconductor · San Jose, California, United States
0+ YOE Bachelor’s with 5+ years, or Master’s with 3+ years, or PhD's with 0+ years of industry experience.; Strong background in microarchitecture and RTL design for complex SoC and die integration.; 5+ years of experience in…
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This posting is pulled directly from Samsung Semiconductor's own Greenhouse page and applying happens on their site, not here. Posted 2026-08-21; Skip The Boards re-checks every company's board regularly and removes listings that disappear from the source.